ASIC/FPGA Encryption Cores.
Stargate Semiconductor offers a family of CipherTime® encryption cores that accelerate both AES encryption and decryption. The Federal Information Processing Standard FIPS approved the Advanced Encryption Standard FIPS-197 in the summer of 2001 and it has quicklybecome the encryption technology standard for the internet, wireless communications, and many other areas that require security.

 

 

 

 

 

 

SGCIPH20 ASIC/FPGA Core


 

The SGCIPH20 (Preliminary) attains 145Mbps AES Encryption/ Decryption @200Mhz. It uses approximately 8K gates and is Ideal for wireless applications and other low speed devices. The SGCIPH20 supports ECB, CBC, and TIMER modes.

 

● 145Mbps Encryption /Decryption throughput @200Mhz.

● Uses approximately 30K gates

● Supports ECB, CBC, and TIMER modes.

● Target ASIC and Altera and Xilinx FPGA's

 


 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SGCIPH40 ASIC/FPGA Core


 

The SGCIPH40 attains 2.9Gbps AES Encryption /Decryption @250Mhz. It uses approximately 30K gates and is Ideal for edge network equipment requiring OC48 type speeds or less. The SGCIPH40 supports ECB, CBC, and TIMER modes.

 

● 2.9Gbps Encryption /Decryption throughput @250Mhz.

● Uses approximately 30K gates

● Supports ECB, CBC, and TIMER modes.

● Target ASIC. Altera, and Xilinx

 


 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SGCIPH60 ASIC/FPGA Core


 

The SGCIPH60 (Preliminary) attains 44.8Gbps AES Encryption/ Decryption @350Mhz. It uses approximately 400K gates and is ideal for Network Routers and Gateway equipment requiring OC48 type speeds or greater. The SGCIPH60 supports ECB, CBC, CFB, OFB, TIMER modes, and fast on-the-fly context switching for multiple SA streams.

 

● 44.8Gbps AES Encryption/ Decryption @350Mhz.

● Uses approximately 400K gates

● Supports ECB, CBC, and TIMER modes.

● Target ASIC. Altera, and Xilinx